Therefore, VHDL stands for Verilog HDL as well as VHDL. 7-6) Throughout the tutorial, the use of VHDL is to mean HDL. Typing dc_shell tcl_mode will launch dc_shell in the dctcl mode. dc_shell: Type dc_shell on the command line.
Invoking Design Compiler Be sure you are in your tutorial directory before you invoke either of the following (because the setup files are in this directory): Design Analyzer: Type design_analyzer on the command line. Chapter 6 is a description of the design that will be synthesized and subsequently optimized. The remainder of Chapter 5 is more information about files that will be used as part of the tutorial. Proceed to change to your tutorial directory and continue the tutorial. 5-4): cp -r /afs//apps/eda/synopsys/doc/syn/tutorial. They can be copied using the following command (which replaces Step 2 on p. 5-4)īefore you actually begin using Design Compiler, you will need to copy the tutorial files. Only in the case of an extreme time crunch is it recommended that you skip these chapters. An overview of Design Compiler is given in these chapters. Chapters 2-4 These chapters are a prologue to the actual tutorial, which begins in Chapter 5. Also, while using dc_shell, it is recommended that dcsh script be used because it is easier to understand if you do not know the Tcl scripting language. To use both interfaces simultaneously, open the Command Window from Design Analyzer and use dc_shell commands. The dc_shell is preferable for a standardized synthesis methodology or optimization of large designs. It is recommended that Design Analyzer be used for most of the synthesis and optimization processes. The dc_shell supports two scripting languages dcsh, which uses the Synopsys language, and dctcl, which uses Tcl (Tool Command Language). 1-6) As part of Design Compiler, Synopsys provides a graphical interface called Design Analyzer and a command line interface call dc_shell. Ignore all portions of the tutorial that describe the use of Windows NT. Operating System You will be working only on Sun workstations at CAE. A complete version for printing can be accessed at: /afs//apps/eda/synopsys/doc/online/synth/print/dctut.pdf 1.
A PDF version of the tutorial broken down into chapter files with hyperlinks to sections can be accessed in the CAE UNIX system at: /afs//apps/eda/synopsys/doc/online/synth/dctut/toc.pdf NOTE: Links will only work when viewed in Adobe Acroreader, not the Netscape Acroread plug-in.
You will be viewing this tutorial on-line as you execute it using Design Compiler. Synopsys Design Compiler TutorialECE 551 - Design and Synthesis of Digital Systems Spring 2002 This document provides instructions, modifications, recommendations and suggestions for performing the Synopsys Design Compiler Tutorial.
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